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CPU: Datapath

What is a datapath?

The datapath is the portion of the CPU that handles all required arithmetic computations. The controller interprets the computer program and then tells the datapath what to do. The datapath is the part of the CPU that "executes an instruction".

What does it do?

Rather than having single 'beginning to end' instructions for the datapath to carry out there is a real advantage in breaking up the process of "executing an instruction" into stages, and then connecting those stages to create the whole datapath, by getting it to follow a sequance of small instruction steps.

Smaller stages are easier to design and test and easy to change and improve - optimize. Being able to change one stage without touching the others makes a steady improvement within a system possible without a single major overhaul.

What is it composed of?

Datapaths typically contain a register file in order to store data, whose outputs are connected to the inputs of an ALU (arithmetic logic unit). Therefore, a controller can achieve a specific computation by reading values from the register file and telling the ALU to perform a specific operation. The result of the ALU can then be stored back into the register file. Generally, actual datapaths are more complicated in order to implement all operations needed by an instruction set.

There are a wide variety of MIPS instructions: but certain stages are common to all.

Stage 1: Instruction Fetch

No matter what the instruction, the 32-bit instruction word must first be 'fetched' from memory (the cache-memory hierarchy)

This is also where MIPS increments PC to point to the next instruction.

MIPS uses byte addressing so PC = PC + 4 - see the MIPS page for background.

Stage 2: Instruction Decode

Upon fetching the instruction, we next gather data from the fields and decode all necessary instruction data. This is done in two steps:

  • Read the opcode to determine instruction type and field lengths
  • Read in data from all necessary registers

for add, read two registers

for addi, read one register

for jal, no reads necessary

Stage 3: ALU (Arithmetic-Logic Unit)

The real work of most instructions is done here:

arithmetic (+, -, *, /),


logic (&, |),


What about loads and stores?

lw $t0, 40($t1)

This means that the address we are accessing in memory = the value in $t1 PLUS the value 40, so we do this addition in this stage

Stage 4: Memory Access

Only the load and store instructions do anything during this stage; the others remain idle or skip this stage altogether.

But as these instructions constitute a unique step, we need this stage.

As a result of the cache system, this stage is expected to be fast.

Stage 5: Register Write

Most instructions write the result of some computation into a register. Therefore this stage is usually used. E.g.: arithmetic, logical, shifts, loads

Stores, branches and jumps don't write anything into a register at the end – therefore these remain idle during this fifth stage or skip it all together.