Pipelining problems: Data dependency

A data dependency occurs when an instruction depends on the results of a previous instruction. A particular instruction might need data in a register which has not yet been stored.

That can occur when calculating that result is the job of a preceeding instruction which has not yet reached that step in the pipeline.

Consequently, the pipeline is stalled and a number of empty instructions - known as bubbles - go into the pipeline.

Data dependency affects long pipelines more than shorter ones since it takes a longer period of time for an instruction to reach the final register-writing stage of a long pipeline.

MIPS' solution to this problem is code reordering.

If for example instruction number 2 depended on a result from instruction number 1, but instrructions 3 and 4 don't rely on each other or 1 and 2, the code could be rearranged so that those instructions are executed in between the two dependent instructions and the pipeline could flow efficiently. The task of code reordering is generally left to the compiler, which recognizes data dependencies and attempts to minimize performance stalls.